Researchers at the Indian Institute of Science (IISc) have developed a design framework to build next-generation analog computing chipsets that could be faster and require less power than the digital chips found in most electronic devices. The team has built a prototype of an analog chipset called ARYABHAT-1 (Analog Reconfigurable Technology And Bias-scalable Hardware for AI Tasks).
Bengaluru based IISc said, “This type of chipset can be especially helpful for Artificial Intelligence (AI)-based applications like object or speech recognition – think Alexa or Siri – or those that require massive parallel computing operations at high speeds.”
The team has designed a novel framework that allows the development of analog processors which scale just like digital processors. Its chipset can be reconfigured and programmed so that the same analog modules can be ported across different generations of process design and across different applications.
The design framework was developed as part of IISc student Pratik Kumar’s PhD work, and in collaboration with Shantanu Chakrabartty, Professor at the McKelvey School of Engineering, Washington University in St Louis (WashU), US, who also serves as WashU’s McDonnell Academy ambassador to IISc.
The researchers have outlined their findings in two preprint studies that are currently under peer review. They have also filed patents and are planning to work with industry partners to commercialise the technology.
